1. Field of the Invention
This invention relates generally to the fabrication of insulating layers for semiconductor devices and more particularly to a method of forming inter-metal dielectric (IMD) layers in a semiconductor device.
2. Description of the Prior Art
High-density plasma chemical vapor deposition (HDP-CVD) processes are particularly suited for deposition of insulating layers in VLSI and USLI technologies, and especially for sub-quarter-micron feature sizes. In addition to appropriate material properties, IMD layers should, ideally, completely fill all gaps between closely spaced metal lines and other metal regions, provide a planar upper surface and be formed at relatively low temperatures. HDP-CVD processes meet these requirements very well. The excellent gap filling characteristics of HDP-CVD IMD layers are well documented. These are particularly required for the high aspect ratio gaps resulting from closely spaced metal lines, prevalent in VLSI and ULSI technologies, which cannot be filled properly using more conventional processes. Insulating layers formed by HDP-CVD processes may require little subsequent planarization steps or none at all, even when deposited over highly irregular surfaces; whereas insulating layers formed on irregular surfaces using more conventional processes usually do require subsequent polarization steps, such as chemical mechanical polishing or etchback. These excellent gap filling and planarization characteristics accrue because in HDP-CVD deposition and etching are both occurring simultaneously. Yet the substrate temperature can be kept well below that where problems can arise, especially with aluminum metallurgy. Other desirable material properties, such as low dielectric constant and good ion gettering capabilities, can be achieved by an appropriate choice of material, for which a range of different materials have been produced using HDP-CVD.
However a major drawback exists in HDP-CVD processes; metal lines are often damaged in these processes leading to a reduced yield and reliability. A number of U.S. patents have addressed this drawback. In U.S. Pat. No. 5,679,606 to Wang et al. there is disclosed a method to reduce metal line damage in HDP-CVD by an in situ encapsulation of the metal lines and substrate with a protective oxide layer. This protective oxide layer is formed by the same electron cyclotron resonance technique as the rest of the insulating layer, and in the same apparatus, except that for the protective layer there is no argon flow. The absence of argon flow reduces the etching action of the process. Although this leads to a reduction in damage to metal lines, damage does still occur and is still a problem, especially for narrow lines. An essentially similar method of forming an IMD layer is shown in U.S. Pat. No. 5,686,356 to Jain et al., whose main point is that conductor reticulation leads to improved planarity when the IMD layer is formed by an HDP-CVD process. Machida et al., in U.S. Pat. No. 4,732,761, also propose an in situ method wherein alternate layers are deposited within a plasma generating chamber. The first oxide layer is deposited using O2 and SiH4 gases and no bias power and then Ar is added to the gas flow with bias power turned on. These layers are alternated. Again, the absence of argon and bias power, while diminishing metal damage, does not eliminate it as an important yield and reliability detractor. This also can be asserted concerning the method for fabricating an IMD contained in U.S. Pat. No. 5,716,890 to Yao. A barrier (nucleation) layer is proposed as the first layer of a many element0 dielectric layer and an HDP-CVD process forms this first layer.
A method for improving the chemical-mechanical polish uniformity of insulating layers by Jang et al., U.S. Pat. No. 5, 674,783, incorporates a conformal insulating layer over a patterned layer, such as metal lines, and under an IMD layer. The growth rate of the overlying IMD layer is reduced over regions where the conformal insulating layer had been appropriately exposed to a plasma, and this effect is used to achieve an improved uniformity of the IMD layer, U.S. Pat. No. 5,451,543 to Woo et al. and U.S. Pat. No. 5,702,981 to Manier et al. show an insulating etch stop layer over a metal layer.